1. Field of the Invention
The present invention relates to a bandgap reference circuit and a related dual-output self-referenced regulator, and more particularly, to a bandgap reference circuit and a related dual-output self-referenced regulator having low system voltage and small layout area.
2. Description of the Prior Art
With the advancement of digital product, a large number of applications for handheld devices appear. Such applications utilize lower system voltage for reducing power consumption. If the circuits of such applications require a reference voltage which does not change with temperature, the circuits needs to utilize a bandgap reference circuit which can be applied in low system voltage operations and can simultaneously provide the low reference voltage.
For example, please refer to FIG. 1, which illustrates a schematic diagram of a conventional bandgap reference circuit 10. As shown in FIG. 1, in the bandgap reference circuit 10, a positive input terminal and a negative input terminal of an operational transconductance amplifier 100 form a virtual short via a negative feedback of the operational transconductance amplifier 100 to make an input voltage VIN+ of the positive input terminal and an input voltage VIN− of the negative input terminal to be equal (VIN+=VIN−=VBE2). A positive temperature coefficient current ID can be generated through a base-to-emitter voltage difference VBE2−VBE1 which is generated by an area difference between bipolar junction transistors Q1 and Q2 with a specific areas ratio of 1:K and a resistor R with a resistance of R. (i.e. a voltage cross the resistor R is VBE2−VBE1), and is shown as equation (1):
                              I          D                =                                                            V                                  BE                  ⁢                                                                          ⁢                  2                                            -                              V                                  BE                  ⁢                                                                          ⁢                  1                                                      R                    =                                                    V                T                            ·                              ln                ⁡                                  (                  K                  )                                                      R                                              (        1        )            
Since the thermal voltage VT of the bipolar junction transistors Q1 and Q2 is a positive temperature coefficient, as can be seen from equation (1), the positive temperature coefficient current ID flowing through the resistor R has a positive temperature coefficient.
On the other hand, since the input voltage VIN+ of the positive input terminal is equal to the base-to-emitter voltage difference VBE2, a negative temperature coefficient current ID′ can be generated through a resistor RL of a resistance of L*R as shown in equation (2):
                              I          D          ′                =                              V                          BE              ⁢                                                          ⁢              2                                            L            *            R                                              (        2        )            
Besides, since the base-to-emitter voltage difference VBE2 has a negative temperature coefficient, the negative temperature coefficient current ID′ flowing through the resistor RL has a negative temperature coefficient. As a result, by adjusting the resistance L*R of the resistor RL properly (i.e. a ratio resistance of the resistor RL and the resistor R), a zero temperature coefficient current IREF can be generated by summing up the positive temperature coefficient current ID and the negative temperature coefficient current ID′ as shown in the equation (3):
                                          I            REF                    =                                                                      V                  T                                ⁢                ln                ⁢                                                                  ⁢                K                            R                        +                                          V                                  BE                  ⁢                                                                          ⁢                  2                                                            L                *                R                                                    ⁢                                  ⁢                                                            ∂                                  I                  REF                                                            ∂                T                                      =                                                                                                      ln                      ⁢                                                                                          ⁢                      K                                        R                                    *                                                            ∂                                              V                        T                                                                                    ∂                      T                                                                      +                                                      1                                          L                      *                      R                                                        *                                                            ∂                                              V                                                  BE                          ⁢                                                                                                          ⁢                          2                                                                                                            ∂                      T                                                                                  =                                                0                  ⁢                                                                          ⇒                  L                                =                                                      -                                                                                            ∂                                                      V                                                          BE                              ⁢                                                                                                                          ⁢                              2                                                                                                                                ∂                          T                                                                                                                                                  ∂                                                          V                              T                                                                                                            ∂                            T                                                                          ⁢                        ln                        ⁢                                                                                                  ⁢                        K                                                                              ≈                                      -                                                                  -                        1.6                                                                    0.085                        ⁢                                                                                                  ⁢                        ln                        ⁢                                                                                                  ⁢                        K                                                                                                                          ,                                    (        3        )            wherein the base-to-emitter voltage difference VBE2 and the thermal voltage VT have a negative temperature coefficient −1.6 mv/C and a positive temperature coefficient 0.085 mv/C a partial differentiation on the temperature variable. Therefore, from the equation (3), when the ratio L between the resistors R and RL is L=1.6/0.085 lnK, the zero temperature coefficient current IREF has a zero temperature coefficient. After the zero temperature coefficient current IREF is mirrored and outputted to a resistor RREF by a current mirror, a zero temperature coefficient voltage VREF can be obtained. The zero temperature coefficient voltage VREF is not limited to the resistance of the resistors R and RL and can be adjusted to a voltage between 0V˜(VDD−VDS)=0V˜(VDD−0.2V) via the resistance of the resistors RREF.
However, under such a structure, for a normal operation of the bandgap reference circuit 10, a system voltage VDD must satisfy a condition of VDD≧VGS+2·VDS≅0.8V+2·0.2V=1.2V (i.e. a path P1 from the system voltage VDD to a ground terminal). Therefore, although the bandgap reference circuit 10 may meet the requirements for a portion of low voltage bandgap reference circuits, the bandgap reference circuit 10 still can not satisfy applications with the system voltage of 1V. (as the above applications for the handheld devices which utilize the lower system voltage for reducing power consumption.)
Besides, although the operational transconductance amplifier 100 can lock the input voltage VIN+ and VIN− under the low system voltage condition, the operational transconductance amplifier 100 increases circuit complexity, layout area, and circuit power consumption in comparison with a general bandgap reference circuit which does not require operating under low voltage. Moreover, an error between the input voltage VIN+ and the input voltage VIN− may be increased due to a process mismatch of an input pair of the operational transconductance amplifier 100, so as to affect the temperature coefficient of the zero temperature coefficient current IREF and the temperature coefficient of the zero temperature coefficient voltage VREF, such that the zero temperature coefficient current IREF and the zero temperature coefficient voltage VREF do not completely have a zero temperature coefficient.
In addition, in comparison with the general bandgap reference circuit which does not require operating under low voltage, the above structure needs to utilize an additional resistor RL′ to balance a current flowing through the resistor RL. In addition to increasing additional layout area and circuit power consumption, the temperature coefficient of the zero temperature coefficient current IREF and the temperature coefficient of the zero temperature coefficient voltage VREF may also be affected when the resistors RL′ and RL are mismatched (i.e. the resistance ratio L between the resistors RL′ and RL does not satisfy the condition in equation (3)), such that the zero temperature coefficient current IREF and the zero temperature coefficient voltage VREF do not completely have a zero temperature coefficient.
On the other hand, please refer to FIG. 2, which illustrates a schematic diagram of a conventional bandgap reference circuit 20. As shown in FIG. 2, the bandgap reference circuit 20 is partially similar to the bandgap reference circuit 10, so the components and signals with similar functions are denoted by the same symbols. The main difference between the bandgap reference circuit 20 and the bandgap reference circuit 10 is that the bandgap reference circuit 20 utilizes two resistors R1, R2 and two resistors R1′, R2′ to replace the resistor RL and the resistor RL′ (a sum of the resistance of the two resistors R1, R2 and a sum of the resistance of the two resistors R1′, R2′ are also L*R). A positive input terminal and a negative input terminal of an operational transconductance amplifier 200 are coupled to a junction between the two resistors R1, R2 and a junction between the two resistors R1′, R2′. The operational transconductance amplifier 200 utilizes an input pair structure of P-type metal oxide semiconductor (MOS) transistors to replace the original input pair structure of N-type MOS transistors in the operational transconductance amplifier 100 to adapt to the adjusted input voltage VIN+ and VIN−.
In such a condition, since the voltage of the junction of the two resistors R1, R2 and the voltage of the junction of the two resistors R1′ and R2′ are equal due to the virtual short and the resistance of the two resistors R1 and R2 are equal to the resistance of the two resistors R1′ and R2′, voltages below the current mirror can also be locked to the base-to-emitter voltage difference VBE1 of the bipolar junction transistor Q1. The same zero temperature coefficient current IREF and the same zero temperature coefficient voltage VREF may also be obtained by referring to the above description of the bandgap reference circuit 10.
Under such a structure, for a normal operation of the bandgap reference circuit 20, the system voltage VDD must satisfy a condition of
  VDD  ≥            V      SG        +          V      SD        +                  V                  BE          ⁢                                          ⁢          2                    ·              (                              R            1            ′                                              R              1              ′                        +                          R              2              ′                                      )              ≅            0.8      ⁢      V        +          0.2      ⁢      V        +                  V                  BE          ⁢                                          ⁢          2                    ·              (                              R            1            ′                                              R              1              ′                        +                          R              2              ′                                      )              >      1    ⁢    V  (i.e. a path P2 from the system voltage VDD to the ground terminal).
However, although the required lowest system voltage VDD in the structure of the bandgap reference circuit 20 may decrease by a voltage VSD=0.2V in comparison with the structure of the bandgap reference circuit 10 by the method of the resistor divider (by adjusting the resistance of the resistor R2′ to be much greater than the resistance of the resistor R1′), the structure of the bandgap reference circuit 20 also needs to utilizes the operational transconductance amplifier 200 to lock the input voltage VIN+ and VIN− and the two resistors R1′, R2′ to balance a current flowing through the two resistors R1, R2, and thus has the shortcomings of the bandgap reference circuit 10.
On the other hand, please refer to FIG. 3, which illustrates a schematic diagram of a conventional bandgap reference circuit 30. As shown in FIG. 3, the bandgap reference circuit 30 is partially similar to the bandgap reference circuit 10, so the components and signals with similar functions are denoted by the same symbols. The main difference between the bandgap reference circuit 30 and the bandgap reference circuit 10 is that an operational transconductance amplifier 300 which removes a tail-current-source 102 for balancing the current in the original operational transconductance amplifier 100 is applied, and an input pair of NPN bipolar junction transistors Q1′ and Q2′ is utilized to replace the original input pair structure of N-type MOS transistors, such that a current of the input pair Q1′ and Q2′ may be controlled by the bipolar junction transistors Q1 and Q2 through a current mirror Q1-Q1′ and a current mirror Q2-Q2′. The same zero temperature coefficient current IREF and the same zero temperature coefficient voltage VREF may also be obtained by referring to the above description of the bandgap reference circuit 10.
Under such a structure, for a normal operation of the bandgap reference circuit 30, the system voltage VDD must satisfy a condition of VDD≧max(VBE+VSD,VSG+VDS)≅max(0.6V+0.2V,0.8V+0.2V)=1V (i.e. a path P3 or a path P4 from the system voltage VDD to the ground terminal). However, although the structure of the bandgap reference circuit 30 removes the tail-current-source 102 of the operational transconductance amplifier by utilizing the current mirror, such that the required lowest system voltage VDD in the structure of the bandgap reference circuit 30 may decrease a voltage VDS=0.2V in comparison with the structure of the bandgap reference circuit 10, the structure of the bandgap reference circuit 30 also needs to utilize the operational transconductance amplifier 300 to lock the input voltage VIN+ and VIN− and utilize the resistor RL′ to balance the current flowing through the two resistor RL and thus has the shortcoming of the bandgap reference circuit 10.
As can be seen from the above, since the conventional bandgap reference circuit for low system voltage utilizes the conventional operational transconductance amplifier to lock the input voltage of the input terminals to generate the positive temperature coefficient current and needs the additional resistors to balance the circuit for generating the negative temperature coefficient current, the circuit structure is complex. Thus, there is a need for improvement of the prior art.